Tarvo Raudvere

Dr. Tarvo Raudvere
former Ph.D. student at

Lab of Electronics and Computer Systems
KTH, Royal Institute of Technology
Department of Microelectronics & Information Technology
Isafjordsgatan 39
P.O.Box Electrum 229
16440 Kista, Sweden

Phone: +46 8 790 4144
Fax: +46 8 751 1793
Email: tarvo@imit.kth.se

Current Research:

My current research interests include engineering of methods for formal high level verification and design of System on Chip. I did belong to the ForSyDe methodology group leaded by Axel Jantsch at KTH.

Teaching:

System Modeling Course 2B1429
General Information
Exercises and Labs

Publications:

[1] Tarvo Raudvere.
System Level Techniques for Verification and Synchronization after Local Design Refinements.
Doctoral thesis. KTH - Royal Institute of Technology. Stockholm, Sweden. August 2007.
PDF

[2] Tarvo Raudvere, Ingo Sander and Axel Jantsch.
Synchronization after Design Refinements with Sensitive Delay Elements.
In the proceedings of CODES+ISSS,
Salzburg, Austria, October 2007.

[3] Tarvo Raudvere, Ingo Sander, and Axel Jantsch.
A Synchronization Algorithm for Local Temporal Refinements in Perfectly Synchronous Models with Nested Feedback Loops.
In the Proceedings of GLSVLSI'07, Stresa, Italy, March 2007.
PDF

[4] Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, and Axel Jantsch.
System level verification of digital signal processing applications based on the polynomial abstraction technique.
In the proceedings of the International Conference on Computer Aided Design (ICCAD 2005),
San Jose, California, USA, November 2005.
PDF

[5] Tarvo Raudvere.
Verification of local design refinements in a system design methodology,
Stockholm, Sweden, April 2004. Licentiate thesis.

[6] Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, and Axel Jantsch.
Polynomial abstraction for verification of sequentially implemented combinational circuits.
In the proceedings of the Design, Automation and Test in Europe Conference (DATE 2004),
Paris, France, February 2004.
PDF

[7] Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, and Axel Jantsch.
Verification of design decisions in ForSyDe.
In the proceedings of CODES+ISSS,
Newport Beach, California, USA, October 2003.
PDF

[8] Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Dilian Gurov, and Axel Jantsch.
The ForSyDe semantics.
In the proceedings of the Swedish System-on-Chip Conference,
Falkenberg, Sweden, March 2002.
PDF

[1]	Tarvo Raudvere. System Level Techniques for Verification and Synchronization after Local Design Refinements. Doctoral thesis. KTH - Royal Institute of Technology. Stockholm, Sweden. August 2007. PDF
[2]	Tarvo Raudvere, Ingo Sander and Axel Jantsch. Synchronization after Design Refinements with Sensitive Delay Elements. In the proceedings of CODES+ISSS, Salzburg, Austria, October 2007.
[3]	Tarvo Raudvere, Ingo Sander, and Axel Jantsch. A Synchronization Algorithm for Local Temporal Refinements in Perfectly Synchronous Models with Nested Feedback Loops. In the Proceedings of GLSVLSI'07, Stresa, Italy, March 2007. PDF
[4]	Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, and Axel Jantsch. System level verification of digital signal processing applications based on the polynomial abstraction technique. In the proceedings of the International Conference on Computer Aided Design (ICCAD 2005), San Jose, California, USA, November 2005. PDF
[5]	Tarvo Raudvere. Verification of local design refinements in a system design methodology, Stockholm, Sweden, April 2004. Licentiate thesis.
[6]	Tarvo Raudvere, Ashish Kumar Singh, Ingo Sander, and Axel Jantsch. Polynomial abstraction for verification of sequentially implemented combinational circuits. In the proceedings of the Design, Automation and Test in Europe Conference (DATE 2004), Paris, France, February 2004. PDF
[7]	Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, and Axel Jantsch. Verification of design decisions in ForSyDe. In the proceedings of CODES+ISSS, Newport Beach, California, USA, October 2003. PDF
[8]	Tarvo Raudvere, Ingo Sander, Ashish Kumar Singh, Dilian Gurov, and Axel Jantsch. The ForSyDe semantics. In the proceedings of the Swedish System-on-Chip Conference, Falkenberg, Sweden, March 2002. PDF