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Johnny
Öberg received the M.Sc. degree in electrical engineering and
Ph.D. degree in Electronic System Design from Royal Institute of Technology
(Kungl. Tekniska Högskolan - KTH), Stockholm, Sweden in 1993 and 1999,
respectively. In june 2003, he got the Docent degree (eq. to Assoc. Prof.) in
Electronic System Design. Since 2006, he is working part time in industry as an
FPGA/Embedded Systems/VHDL design consultant.
He is an appreciated teacher and has extensive educational experience. He was involved
in the development of the "Civilingenjörs" (Master's) programme on Information Technology,
where he was responsible for the development of the Circuit Design Track, and in the development of
the International MSc programme on System-On-Chip Design. He has taught several MSc-level courses/topics during
the years, including High-Level Synthesis, Digital Design, Digital Design using HDLs, ASIC Design and
DSP Design using HDLs.
He has published more than 60 international reviewed
papers in the areas Grammar-based Hardware Synthesis, High-Level Synthesis,
HW/SW Codesign, and High-performance Hardware Architectures for a number of
application areas like Pulse-Coupled Neural Networks, Processor Architectures,
and ATM Traffic Shaper functionality. His research interests include
Grammar-based Specification and Hardware Synthesis, Protocol Processors,
Computation Intensive Hardware Architectures and the Development
and (Re-)use of Intellectual Property (IP), Reconfigurable HW and FPGAs,
Embedded HW, and ASIC Design and Test, and Network-on-Chips.
Teaching activities:
Courses I've taught or teach.
Open MSc Thesis positions
Publications:
Chronological
List,
List
sorted by Topic
Theses
During Sept. - Nov. 1992, he was with the JET
Joint Undertaking facility in Culham, England, and the Dept. of Fusion
Plasma Physics, KTH, where he did his Master Thesis on the topic "Tuning
of JET Transmission Line/Antenna System During ICRH (Ion Cyclotron Resonance
Heating)". He recieved his Master's degree in April 1993. He then
joined the Dept. of Electronics, KTH, where he performed his PhD studies
at the Electronic System Design Laboratory (ESDLab) in the field of Electronic
Design Automation. He got the Licentiate of Technology Degree in December 1996, with the thesis
"An Adaptable Environment for Improved High-Level Synthesis". He graduated in May 1999, with the thesis "ProGram:
A Grammar-Based Method for Specification and Hardware Synthesis of Communication
Protocols".
- J. Öberg, "Tuning of JET Transmission Line/Antenna System
During ICRH", Master's Thesis, Fusion Plasma Physics, Alfvén
Laboratory, TRITA-ALF-1993-06.
- J. Öberg, "An Adaptable Environment for Improved High-Level
Synthesis", Licentiate Thesis, TRITA-ESD-1996-14.
- J. Öberg, "ProGram: A Grammar-Based Method for Specification and Hardware Synthesis of Communication Protocols", PhD Thesis, TRITA-ESD-1999-03.
Journal Publications (including Book Chapters):
-
J. Öberg, A. Kumar, A. Hemani, S. Kumar, "Specification
and Synthesis of Exception Handling in Grammar-based Hardware Synthesis",
In the Journal of Electrical Engineering and Information Science, Korea,
Vol. 3, No. 6, Dec. 1998, pp 724-735, The last name of the first author
was misprinted in the Journal (as Öerg) because of a printing error
concerning the handling of umlauts.
-
J. Öberg, A. Kumar, A. Hemani, "Grammar-Based
Hardware Synthesis from Port Size Independent Specifications", In the IEEE
Transactions on VLSI Systems, Vol. 8, No. 2, pp. 184-194, April, 2000.
-
A. Hemani, A. Kumar Deb, J. Öberg, A. Postula,
D. Lindqvist, B. Fjellborg, "System Level Virtual Prototyping of DSP SOCs
Using Grammar Based Approach", In the Design Automation for Embedded Systems,
An International Journal, Vol. 5, No. 3, pp. 295-311, Kluwer
Academic Publishers, Aug. 2000.
-
A. Jantsch, S. Kumar, I. Sander, B. Svantesson, J.
Öberg, A. Hemani, P. Ellervee, M. O'Nils, "Comparison of Six Languages
for System Level Descriptions of Telecom Systems", In Jean Mermet, editor,
"Electronic Chips & Systems Design Languages", pp. 181-192, Kluwer Academic
Publishers, 2001, ISBN 0-7923-7311-1.
-
J. Öberg, M. O'Nils, A. Jantsch, A. Postula,
A. Hemani, "Grammar-based Design of Embedded Systems",
In the Journal of Systems Architecture, No. 47, pp. 225-250, Elsevier Science B.V., 2001.
- J. Öberg, "Clocking Strategies for Network-on-Chips",
(invited paper), In "Networks-on-Chip", edited by A. Jantsch, pp.
153-172, Kluwer Academic Publishers, 2003.
Selected Refereed Conference Publications:
-
A. Jantsch, P. Ellervee, J. Öberg, A. Hemani,
H. Tenhunen, "Hardware-Software Partitioning and Minimizing Memory Interface
Traffic", In Proc. of EURO-DAC'94, pp 226 - 231, Grenoble, France, Sept.
1994.
-
J. Öberg, J. Isoaho, P. Ellervee, A. Jantsch,
A. Hemani, "A Rule-Based Allocator for Improving Allocation of Filter Structures
in HLS", In Proc. of the VLSI Design'96 Conference, pp 133-139, Bangalore,
India, Jan. 3-6, 1996.
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J. Öberg, A. Kumar, A. Hemani, "Grammar-based
Hardware Synthesis of Data Communication Protocols", In Proc. of the 9th
International Symposium on System Synthesis (ISSS'96), pp 14-19, La Jolla,
California, Nov. 6-8, 1996.
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J. Öberg, A. Kumar, A. Jantsch, "An Object-Oriented
Concept for Intelligent Library Functions", In Proc. of the VLSI Design`98
Conference, pp. 355-358, Chennai, India, Jan. 4-7, 1998.
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J. Öberg, A. Kumar, A. Hemani, "Scheduling of
Outputs in Grammar-based Hardware Synthesis of Data Communication Protocols",
In Proc. of DATE'98, pp. 596-603, Paris, France, Feb. 23-26,1998.
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J. Öberg, P. Ellervee, "Revolver: A high-performance
MIMD architecture for collision free computing", In Proc. of EuroMicro'98,
Vol. I, pp. 301-308, Västerås, Sweden, Aug. 25-27, 1998.
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J. Öberg, A. Jantsch, A. Hemani, "Validation
of Interface Protocols Using Grammar-based Models", In the Proc. of the
IEEE International High Level Design Validation and Test Workshop (HLDVT'98),
pp. 40-46, La Jolla, California, Nov. 12-14, 1998.
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T. Meincke, A. Hemani, T. Olsson, P. Nilsson, J.
Öberg, P. Ellervee, S. Kumar, D. Lindqvist, "Lowering Power Consumption
in Clock by Using Globally Asynchronous, Locally Synchronous Design Style",
In the Proc of DAC'99 (36th DAC), pp. 873-878, New Orleans, LA, USA, June
21-25, 1999.
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A. Jantsch, J. Öberg, A. Hemani, "Is there a
Niche for a General Purpose Protocol Processor?", In Proc. of NorChip'98,
pp. 93-100, Lund, Sweden, Nov. 9-10, 1998.
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A. Hemani, A. Postula, A. Jantsch, J. Öberg,
M. Millberg, D. Lindqvist, S. Kumar, "Network on a Chip: An architecture for
billion transistor era", In Proc. of NorChip-2000, pp. 166-173, Turku,
Finland, Nov. 2000.
- A. Kumar Deb, J. Öberg, A. Jantsch, "Control and Communication
Performance Analysis of Embedded DSP Systems in the MASIC Methodology",
In Proc. of the 14th Int. Symposium on System Synthesis (ISSS 2001), pages
274-279, Montreal, Canada, October 2001.
- D. Pamunuwa, J. Öberg, L. R. Zheng, M. Millberg, A. Jantsch, H.
Tenhunen, "Layout, Performance and Power Trade-Offs in Mesh-Based
Network-on-Chip Architectures", In Proc. of the 2003 IFIP International
Conference on Very Large Scale Integration (VLSI-SOC 03) (in press),
Darsmstadt, Germany, Dec 2003.
- A.K. Deb, A. Jantsch, J. Öberg, "System DSP Design using the
MASIC methodology", In Proc. of the Design Automation and Test in
Europe (DATE) Conf. 2004, pp 630-635, Paris, France, Feb 2004. Nominated
for Best Paper Award in its category.
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