| [1] | Axel Jantsch. ForSyDe: A formal framework for heterogeneous models of computation. Invited tutorial at the International Symposium on Systems on Chip, November 2011. [ .pdf ] |
| [2] | Axel Jantsch. Computational limits in 3-d integrated systems. Keynote at the International Symposium on Systems on Chip, November 2011. [ .pdf ] |
| [3] | Axel Jantsch. ForSyDe: A formal framework for heterogeneous models of computation. Invited Seminar at the Shenzhen Institute of Advanced Technology, Chinese Acadamy of Science, September 2011. [ .pdf ] |
| [4] | Axel Jantsch. Shared memories in multiprocessors. Lecture at the Shenzhen Summer School on Embedded Systems, July 2011. [ .pdf ] |
| [5] | Axel Jantsch. Predictable communication performance in on-chip networks. Invited Seminar at University of Technology Vienna, June 2011. [ .pdf ] |
| [6] | Axel Jantsch, Xiaowen Chen, Zhonghai Lu, Chaochao Fao, Abdul Nameed, Yang Zhang, and Ahmed Hemani. Memory architecture and management in a NoC platform. Tutorial at Design Automation and Test Conference (DATE), March 2011. [ .pdf ] |
| [7] | Axel Jantsch. Network on chip. Seminar at the Huawei-Fudan Workshop, Shanghai, China, December 2010. [ .pdf ] |
| [8] | Axel Jantsch. Predictable communication performance in on-chip networks. Docent Lecture at University of Turku, Finland, December 2010. [ .pdf ] |
| [9] | Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sandro Penolazzi, and Zhonghai Lu. Memory architecture and management in a NoC platform. Seminar at Fudan University, Shanghai, China, December 2010. [ .pdf ] |
| [10] | Axel Jantsch, Xiaowen Chen, Abdul Naeem, Yuang Zhang, Sandro Penolazzi, and Zhonghai Lu. Memory architecture and management in a NoC platform. Seminar at Nanjing University, Nanjing, China, December 2010. |
| [11] | Axel Jantsch, Matthew Grange, and Dinesh Pamunuwa. Promises and limitations of 3-D integration. Seminar at NUDT, Changsha, China, December 2010. [ .pdf ] |
| [12] | Axel Jantsch and Zhonghai Lu. Trends in terascale on-chip computing 2010-2020. Invited Seminar at the ICES annual conference, September 2009. [ .pdf ] |
| [13] | Axel Jantsch and Zhonghai Lu. Trends in terascale on-chip computing 2010-2020. Invited Seminar at Nanjing University, July 2009. |
| [14] | Axel Jantsch et al. The Nostrum network on chip. Invited Seminar at Fudan University, June 2009. [ .pdf ] |
| [15] | Axel Jantsch and Zhonghai Lu. Networks on chip. Short course at Fudan University, June 2009. [ .pdf ] |
| [16] | Axel Jantsch. Resource allocation for quality of service on-chip communication. Invited seminar at the University of Cantabria, Santander, Spain, February 2009. |
| [17] | Axel Jantsch. Resource allocation for quality of service on-chip communication. Invited seminar at the real Time Research Center in Vasteras, Sweden, February 2009. |
| [18] | Axel Jantsch. Nostrum network on chip. Invited Seminar at the Turku center of Computer Science, April 2008. |
| [19] | Axel Jantsch and Zhonghai Lu. Quality of service in networks on chip. Invited Seminar at the Research Center Telecommunciation Vienna (FTW), April 2008. [ .pdf ] |
| [20] | Axel Jantsch. A formal framework for heterogeneous models of computation. Tutorial at Design Automation and Test Conference (DATE), March 2008. |
| [21] | Axel Jantsch. Network layer communication performance in networks on chip. Tutorial at the Asian Pacitific Design Automation Conference, January 2008. [ .pdf ] |
| [22] | Axel Jantsch. The nostrum network on chip. Invited Seminar at Turku Center for Computer Science, November 2007. [ .pdf ] |
| [23] | Zhonghai Lu and Axel Jantsch. Slot allocation using logical networks for TDM virtual circuit configuration for network-on-chip. Invited Seminar at Eindhoven University of Technology, November 2007. [ .pdf ] |
| [24] | Axel Jantsch. Performance analysis and dimensioning of bandwidth and buffer capacity. Section I of Full Day Tutorial "Tutorial on Networks on Chip" at the NoC Symposium 2007, May 2007. [ .pdf ] |
| [25] | Axel Jantsch. NoC: State of the art, trends and challenges. Section I of Full Day Tutorial "NoC at the Age of Six: Advanced Topics, Current Challenges and Trends" at DATE 2007, April 2007. [ .pdf ] |
| [26] | Axel Jantsch. Models of computation for networks on chip. Invited Seminar at IMEC, February 2007. |
| [27] | Axel Jantsch. ForSyDe: A denotational framework for heterogeneous models of computation. Invited Presentation at the ARTIST workshop Models of Computation and Communication, November 2006. [ .pdf ] |
| [28] | Axel Jantsch. Models of computation for networks on chip. Invited Seminar at VirginiaTech, November 2006. |
| [29] | Axel Jantsch. Compositional traffic in networks on chip. Invited presentation at the Baltic Electronic Conference, October 2006. [ .pdf ] |
| [30] | Axel Jantsch. Communication performance in network-on-chips. Short course at Tallinn Technical University, October 2006. [ .pdf ] |
| [31] | Tiberius Seceleanu, Axel Jantsch, and Hannu Tenhunen. On-chip distributed architectures. Tutorial at the International SoC Conference, September 2006. Austin, Texas. [ .pdf ] |
| [32] | Axel Jantsch. Exchange of course modules across universities. Invited presentation at the 6th European Workshop on Microelectronic Education, June 2006. [ http ] |
| [33] | Axel Jantsch. Models of computation for networks on chip. Invited talk at the Sixth International Conference on Application of Concurrency to System Design, June 2006. [ .pdf ] |
| [34] | Axel Jantsch. Standards for NoC: What can we gain? Invited presentation at the Workshop on Future Interconnect and NoC, March 2006. [ .pdf ] |
| [35] | Axel Jantsch. The Nostrum network on chip. Invited presentation at the International Symposium on System-on-Chip, Tampere, Finland, November 2005. [ .pdf ] |
| [36] | Axel Jantsch. The Nostrum network on chip. Invited presentation at Lancaster University, October 2005. |
| [37] | Axel Jantsch. NoC: A new contract between hardware and software? Invited seminar at Lancaster University, October 2005. |
| [38] | Axel Jantsch, Robert Lauter, and Arseni Vitkowski. Power analysis of link level and end-to-end protection in networks on chip. Invited presentation for the special session on Networks on Chip at ISCAS, May 2005. [ .pdf ] |
| [39] | Axel Jantsch. The nostrum network on chip. Invited Seminar at Åbo Akademi, Turku, Finland, March 2005. [ .pdf ] |
| [40] | Axel Jantsch. The nostrum network on chip. Guest lecture in the SoC Architecxture course, KTH, December 2004. [ .pdf ] |
| [41] | Axel Jantsch. Networks on chip. Invited seminar at Linköping University - Part I, November 2004. [ .pdf ] |
| [42] | Axel Jantsch. Communication performance in networks on chip. Invited seminar at Linköping University - Part II, November 2004. [ .pdf ] |
| [43] | Axel Jantsch. The nostrum network on chip. Invited seminar at Linköping University - Part III, November 2004. [ .pdf ] |
| [44] | Axel Jantsch. The nostrum network on chip. LECS Seminar, KTH, September 2004. [ .pdf ] |
| [45] | Axel Jantsch. The Nostrum network on chip. Invited presentation at ProRISC, November 2003. [ .pdf ] |
| [46] | Axel Jantsch. System specification fundamentals. Invited presentation at the Medea+ conference, November 2003. [ http ] |
| [47] | Axel Jantsch. NoCs: A new contract between hardware and software. Keynote at the Euromicro Symposium on Digital System Design, September 2003. [ .pdf ] |
| [48] | Axel Jantsch. Communication performance in network-on-chips. Presentation at the Swedish INTELECT Summer School on Multiprocessor Systems on Chip, August 2003. [ .pdf ] |
| [49] | Axel Jantsch. Communication refinement for a network-on-chip platform. Presentation at the International Seminar on Application-Specific Multi-Processor SoC (MPSOC), July 2003. [ .pdf ] |
| [50] | Axel Jantsch. Will networks on chip close the productivity gap? Presentation at the "Special Topics in SoC" Course at KTH (4h), May 2003. [ .pdf ] |
| [51] | Axel Jantsch. Networks on chip - status of Nostrum. Invited Presentation at Darmstadt University of Technology, April 2003. [ .pdf ] |
| [52] | Axel Jantsch. What is a good platform? Presentation at the EDA Gruppen Meeting, February 2003. [ .pdf ] |
| [53] | Axel Jantsch. Networks on chip. Presentation at the SoC Architecture Course at KTH, December 2002. [ .pdf ] |
| [54] | Axel Jantsch. Networks on chip: A paradigm change? Presentation at the SOCWare Day, Kista, November 2002. [ http ] |
| [55] | Axel Jantsch. Network on chip architecture. Presentation at the EXCITE Workshop, Helsinki, November 2002. [ http ] |
| [56] | Axel Jantsch. Networks on chip. Presentation at the Conference RadioVetenskap och Kommunikation, June 2002. [ http ] |
| [57] | Axel Jantsch. A template for distance learning courses without loss of quality. Presentation at the SoC SME Workshop, April 2002. [ http ] |
| [58] | Axel Jantsch. Embedded software/system in the SOC Master program. Presentation at the Socware Education workshop, November 2001. [ .pdf ] |
| [59] | Axel Jantsch. Industrial ph.d. projects (30min). Presentation at the Industrial Research Seminar at SaabTech, Stockholm, Sweden, September 2001. [ http ] |
| [60] | Axel Jantsch. Introduction to networks on chip (30min). Workshop at the European Solid-State Circuit Conference (ESSCIRC), Villach, Austria, September 2001. [ .pdf ] |
| [61] | Axel Jantsch. Network-on-chip architectures (30min). Workshop at the European Solid-State Circuit Conference (ESSCIRC), Villach, Austria, September 2001. [ .pdf ] |
| [62] | Axel Jantsch. Models of computation in embedded system design (50 min). Presentation at the the Department of Computer Science at Linköping University, September 2001. [ .pdf ] |
| [63] | Axel Jantsch. HW/SW codesign (4h). Presentation at Jönköping University, May 2001. [ .pdf ] |
| [64] | Axel Jantsch. System modelling and SDL-Matlab cosimulation (2h). Presentation at the Eurotraining System-on-Chip Course, Stockholm, Sweden, May 2001. [ .pdf ] |
| [65] | Axel Jantsch. System modelling - models of computation and their applications. Presentation at System-on-Chip Design at the Graz University of Technology (50 min), April 2001. [ http ] |
| [66] | Axel Jantsch. International master of science program in system-on-chip design at KTH. Presentation at System-on-Chip Design at the Graz University of Technology (10 min), April 2001. [ http ] |
| [67] | Axel Jantsch. The usage of stochastic processes in embedded system specifications. Presentation at the HW/SW Codesign Symposium in Copenhagen (20 min), April 2001. [ http ] |
| [68] | Axel Jantsch. System modelling - models of concurrency and their applications (4h). Presentation at Jönköping University, April 2001. [ http ] |
| [69] | Axel Jantsch. Introduction to Haskell and ForSyDe. Presentation at KTH (1h), March 2001. [ http ] |
| [70] | Axel Jantsch. System-on-chip education (15 min). Panel Presentation at NorChip 2000, Turku, Finland, November 2000. [ http ] |
| [71] | Axel Jantsch. Network on a chip - an architecture for the billion transistor era (30 min). Presentation at IEEE NorChip Conference, Turku, Finland, November 2000. [ http ] |
| [72] | Axel Jantsch. System modelling and SDL-Matlab cosimulation (2h). Presentation at the Eurotraining System-on-Chip Course, Copenhagen, Denmark, October 2000. |
| [73] | Axel Jantsch. Electronic design automation - the next 50 years (1h). Docent lecture at KTH, Stockholm, Sweden, June 2000. [ .pdf ] |
| [74] | Axel Jantsch. System modelling and SDL-Matlab cosimulation (2h). Presentation at the Eurotraining System-on-Chip Course, Grenoble, France, May 2000. |
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